Available as a mezzanine add-on expansion
board to the CCG-RUMBA and successor CPU
cards, the CCK-MARIMBA provides a number of
additional I/O functions. First of all, the CCKMARIMBA itself is a carrier board, suitable for
accommodation of either a single width PMC or
XMC module.
The additional SATA/PATA controller is useful
for attachment of mass-storage devices, either
on-board mounted, or externally (by cable).
Furthermore the CCK-MARIMBA is equipped
with a SIO, which provides legacy I/O ports,
such as serial, parallel, KB/MS (all available
across rear I/O).
A secondary Firmware Hub can be configured
as alternate- or backup-BIOS.
Another option available is the Trusted Platform
Module according to TPM 1.2 for safety critical
applications.
The CCK-MARIMBA will be attached on top of
the CPU carrier board, and typically shares its
front panel with the host carrier (usually 8HP
front panel width in total). Interconnection
between the CCK-MARIMBA I/O module and
the CPU carrier board is achieved by two
expansion connectors, which comprise the PCIe
(PCI Express x 4) and LPC (Low Pin Count)
interfaces.
As an option, the CCK-MARIMBA is available
with a mezzanine module (C20-SATA), which
accommodates one or two 2.5-inch SATA hard
disk drives (RAID option). Additionally, a
CompactFlash card adapter can be mounted on
bottom of the CCK-MARIMBA.
The CCK-MARIMBA communicates by means of
2 bottom mount expansion connectors with the
host CPU: P-PCIE (PCI Express x 4), and P-EXP
(multi-function I/F such as LPC, USB, SMB).
The PCI Express interface (connector P-PCIE) is
comprised of 4 PCIe lanes, which are derived
from the ICH (southbridge chip) on the CPU
carrier board. All 4 lanes are routed to the
primary port of a 3-port 12-lane PCI Express
packet switch, which is the main component of
the CCK-MARIMBA.
Connector P-EXP combines several other
southbridge data channels: The LPC (Low Pin
Count) is a multiplexed ISA bus, e.g. enabling
the super-I/O (SIO) controller chip to emulate
the legacy I/O interfaces; among these are the
classic parallel (printer) and serial (COM) ports.
Two USB channels are provided, one for the
optional USB SSD, and one or both for rear I/O
via the J2 connector.
The Trusted Platform Module is an optionally
available cryptographic chip, which provides a
comprehensive hardware and software solution
for safer computing. Conforming to the TPM1.2
standard of the TCG, the TPM is comprised of a
16-bit security controller and additional
hardware e.g. to generate 2048 bit RSA keys
and true random numbers, thus meeting the
highest industry rating for digital security.
The CCK-MARIMBA fits on the top side of the
CPU board, which is on the right side when
viewing the common front panel. A suitable
backplane provides its CPCI slots beginning with
the CPU carrier board (CPCI system slot) from
right to left. The CPCI system must provide
additional mounting space to the right side for
the CCK-MARIMBA. In addition, a single slot
rear I/O backplane would be needed for rear I/O
usage, and a custom specific rear I/O transition
module.